Sequence Detector 1010 (Moore Machine + Mealy Machine + Overlapping/Non-Overlapping)

Hi, this post is about how to design and implement a sequence detector to detect 1010. This is the fifth post of the series. The previous posts can be found here: sequence 1011, sequence 1001, sequence 101, and sequence 110. I am going to cover both the Moore machine and Mealy machine in overlapping and non-overlapping cases.

1) Moore Machine (Non-Overlapping) module sd1010_moore(input bit clk,
input logic reset,
input logic din,
output logic dout);

typedef enum logic [2:0] {S0, S1, S2, S3, S4} state_t;
state_t state;

always @(posedge clk or posedge reset) begin
if(reset) begin
dout <= 1'b0;
state <= S0;
end
else begin
case(state)
S0: begin
dout <=1'b0;
if(din)
state <= S1;
end
S1: begin
dout <= 1'b0;
if(~din)
state <= S2;
end
S2: begin
dout <= 1'b0;
if(din)
state <= S3;
else
state <= S0;
end
S3: begin
dout <= 1'b0;
if(din)
state <= S1;
else
state <= S4;
end
S4: begin
dout <= 1'b1;
if(din)
state <= S1;
else
state <= S0;
end
endcase
end
end

endmodule

2) Mealy Machine (Non-Overlapping) module sd1010_mealy(input bit clk,
input logic reset,
input logic din,
output logic dout);

typedef enum logic [1:0] {S0, S1, S2, S3} state_t;
state_t state;

always @(posedge clk or posedge reset) begin
if(reset) begin
dout <= 1'b0;
state <= S0;
end
else begin
case(state)
S0: begin
if(din) begin
state <= S1;
dout <=1'b0;
end
else
dout <=1'b0;
end
S1: begin
if(~din) begin
state <= S2;
dout <=1'b0;
end
else begin
dout <=1'b0;
end
end
S2: begin
if(~din) begin
state <= S0;
dout <=1'b0;
end
else begin
state <= S3;
dout <=1'b0;
end
end
S3: begin
if(din) begin
state <= S1;
dout <=1'b0;
end
else begin
state <= S0;
dout <=1'b1;
end
end
endcase
end
end

endmodule

3) Moore Machine (Overlapping) module sd1010_moore_over(input bit clk,
input logic reset,
input logic din,
output logic dout);

typedef enum logic [2:0] {S0, S1, S2, S3, S4} state_t;
state_t state;

always @(posedge clk or posedge reset) begin
if(reset) begin
dout <= 1'b0;
state <= S0;
end
else begin
case(state)
S0: begin
dout <=1'b0;
if(din)
state <= S1;
end
S1: begin
dout <= 1'b0;
if(~din)
state <= S2;
end
S2: begin
dout <= 1'b0;
if(din)
state <= S3;
else
state <= S0;
end
S3: begin
dout <= 1'b0;
if(din)
state <= S1;
else
state <= S4;
end
S4: begin
dout <= 1'b1;
if(din)
state <= S3;
else
state <= S0;
end
endcase
end
end

endmodule

4) Mealy Machine (Overlapping) module sd1010_mealy_over(input bit clk,
input logic reset,
input logic din,
output logic dout);

typedef enum logic [1:0] {S0, S1, S2, S3} state_t;
state_t state;

always @(posedge clk or posedge reset) begin
if(reset) begin
dout <= 1'b0;
state <= S0;
end
else begin
case(state)
S0: begin
if(din) begin
state <= S1;
dout <=1'b0;
end
else
dout <=1'b0;
end
S1: begin
if(~din) begin
state <= S2;
dout <=1'b0;
end
else begin
dout <=1'b0;
end
end
S2: begin
if(~din) begin
state <= S0;
dout <=1'b0;
end
else begin
state <= S3;
dout <=1'b0;
end
end
S3: begin
if(din) begin
state <= S1;
dout <=1'b0;
end
else begin
state <= S2;
dout <=1'b1;
end
end
endcase
end
end

endmodule

That’s all for sequence detectors 1010. Let me know if you have any questions or any thoughts.

One thought on “Sequence Detector 1010 (Moore Machine + Mealy Machine + Overlapping/Non-Overlapping)”

1. deepak says: