The Design of a USART

This design is to design a USART from Atmel data spec. The complete data spec can be found here.

The block diagram is shown in the following:

Screen Shot 2016-07-15 at 1.10.26 AM

As we can see, the whole design is consisted of three major blocks: baud rate generator, transmitter and receiver. Baud rate generator generates clocks from transmitter and receiver. Transmitter takes data out one bit by one bit. And receiver receives data from outside one bit by one bit.

The Data transmission of transmitter and receiver is the same, and described in the following figure:


Screen Shot 2016-07-19 at 11.22.18 PM

It starts with a start bit, which goes to 0. Then it follows by 5 to 9 data bits, an optional parity bit, and one or two stop bits indicating the end of the transfer.

Parity bit

P_{even}=d_{n-1}\oplus...\oplus d_3 \oplus d_2 \oplus d_1 \oplus d_0 \oplus 0
P_{odd}=d_{n-1}\oplus...\oplus d_3 \oplus d_2 \oplus d_1 \oplus d_0 \oplus 1